An Eight-Octant bipolar junction transistor analog multiplier circuit and its applications

This paper presents a circuit topology for an eight-octant analog multiplier implemented using bipolar junction transistors. The proposed circuit is an extension of four-quadrant Gilbert multiplier. The possibility of multiplying three input signals using the proposed circuit is theoretically proved. A scheme to upgrade this circuit to operate for large input signals is also proposed. Theoretical results are validated through spice simulations for small input signals. The possible use of the proposed circuit as a three input mixer, three input emitter coupled logic, or two input multiplier with an enable/disable switch is shown through spice simulations.


INTRODUCTION
Nonlinear operations on analog signals are performed in various stages of communication, control, and instrumentation systems (Bryant, 2013;Gray et al., 2010;Herath, 2009;Razavi et al., 2001). These operations include multiplication, modulation, demodulation, frequency synthesis, and logic operations. Most commonly used circuit for such operations is the Gilbert Four-Quadrant Multiplier (Nikseresht et al., 2017;Quintero, 2014;Gray et al., 2010;Chien, 2006;Can, 1999;Gilbert et al., 1974;Gilbert et al., 1968). This multiplier circuit can multiply two small input signals. The input signals can operate in all four quadrants (any polarity). The four-quadrant multiplier input can be modified to accommodate large input signals (Gray et al., 2010). Furthermore, Gilbert four-quadrant multiplier circuit topology can be extended to multiply arbitrary number of input signals (Hong et al., 2016;Kimura, 1994;Choma, 1981). Corresponding circuit topology features pairs of differential pairs equal to the number of inputs whose inputs are cross connected and outputs are connected in parallel, "stacked" on top of one another between the load and the bottom most differential pair (Hong, et al., 2016). The multiplier circuit can be realized using bipolar junction transistor (BJT) or metal oxide semiconductor (MOS) technologies (Bryant, 2013;Chien, 2006;Can, 1999;Keating, 1998;Razavi et al., 1994;Blut et al., 1986). This study presents a three input (eight octant) multiplier circuit topology that uses BJT technology. The advantage of the proposed circuit topology over the existing circuit topologies is that in this topology output signal polarity can be flipped using an external trigger. The drawback is the increase in number of transistors used in the circuit.

Theory
The output currents of the emitter coupled pair shown in the Figure 1 is related to the input voltage V by (Gray et al., 2010;Razavi, 2001) (1) (1) where is the thermal voltage and is the tail current. The base current where is the collector current. The difference between output (Gray et al., 2010) currents of the emitter coupled pair is given by . ( In the four quadrent (Gilbert) multiplier circuit shown in the Figure 2 the difference between the output currents is given by (Gray et al., 2010;Chien, 2006;Gilbert, 1974;Gilbert, 1968). (3) Here and are two inputs respectively. In order to obtain the result given in (3) result (1) is directly applied to the upper transistor layers of the circuit shown in the figure 2. It is possible to do that because when deriving (1) there is no condition that should be derived from a current source.
The proposed eight-octant multiplier circuit is shown in (1) the Figure 3. The basic circuit consists of 14 bipolar junction transistors. They are arranged into three layers of emitter coupled pairs. The bottom layer consists of transistors Q 1 and Q 2 . The middle layer consists of transistors Q 3 , Q 4, Q 5 , and Q 6 . The top layer consists of transistors Q 7 , Q 8, Q 9 , Q 10 , Q 11 , Q 12, Q 13 , and Q 14 . Transistos in each layer are identical. The collectors of the top layer of transistors are tied into two groups where collectors of Q 7 , Q 9 , Q 11 , andQ 13 are tied together and the collector of Q 8, Q 10 , Q 12, and Q 14 are tied together. Three input signals are applied between bases of the emitter coupled pairs in each layer as shown in Figure  3. In the following DC analysis it is assumed that the output resistance of the biasing current source and the output resistance of transistors are negligeble. The output voltage is given by, Where and are as shown in the Figure 3. According to the Figure 3.
With a similar argument it can be deduced that (7) and (8) Let , , and .
Above analysis proves that for small input signals the output voltage of the circuit shown in the Figure 3 is proportional to the multiplication of three input signals where is the proportionality constant. As the analysis does not impose any restriction with regard to the polarity of the input signals this multiplier can operate in all the eight octants of a three dimensional coordinate system.
The circuit shown in the Figure 3 can be modified to multiply large input signals by pre-distorting the input signal as shown in the Figure 4 where K is a constant (Gray et al., 2010). With that modification . (17) In the circuit shown in the Figure 3 if collectors of and are cross connected respectively to coupled emitters of and then the output voltage .
(18) Therefore by toggling the connections of the collectors of and between direct and cross connection through an external trigger, as shown in the Figure 5, it is possible to change the polarity of the output signal.
In practical applications the current source can be realized using a current mirror (Gray et al., 2010).

RESULTS AND DISCUSSION
As discussed in the introduction, the proposed multiplier circuit can be used as (a) eight-octant analog multiplier (b) switch that will control the output of a two input multiplier (c) three input mixer or (d) Three input emitter coupled logic circuit. Following simulation results discuss each of the above applications.
The circuit shown in the Figure 3 was implemented using quite universal circuit simulator (Qucs) open source circuit simulation software. In all the simulations , . is considered to be 26 mV for all simulations except thermal simulation.
Small input signals are used so that linear approximation H. M. V. R. Herath and G. H. I. Wimalarathna is valid. The simulation of thermal performance and noise performance were carried out using LTspice freeware.

Eight-octant analog multiplier
Following signals were applied to the input of the circuit (19) According to (16)  In order to verify that multiplication can be done in all eight octants signals similar to the ones used in the previous example but separated from each other by mV mV Figure 6: Three input multiplier simulated output (a) and expected output (b) with sinusoidal inputs. phase shift were applied to inputs. The expected output signal is . Figure 7 (a) shows the output signal in the time domain and figure 7 (b) shows the output signal in the frequency domain. It is evident that multiplication of the input signals has occurred as expected.
In order to observe the behavior of the circuit when the input signals are large, signals , , and were used as the input signals for the circuit shown in the figure 3 and the corresponding output signal was observed. Figure 8 (a) shows the output signal in the time domain. As expected, nonlinear distortions can be observed in the output signal. Corresponding frequency domain representation is given in the figure 8 (b).
Signals shown in Figure 9 (a) were applied to the three input ports. The magnitudes of the input signals during non-zero voltage levels are 5 mV, 10 mV, and 15 mV. As shown in the Figure 9 (b) output signal is non-zero when all the inputs are non-zero.  Signals shown in the Figure 10 (a) were applied to the three input ports. The magnitudes of the input signals during non-zero voltage levels are 100 mV, 200 mV, and 300 mV. As shown in the Figure 10 (b) output signal is nonzero when all the inputs are non-zero. Because the three input signals are much larger than the circuit operates in the nonlinear region.
The circuit shown in the Figure 3 can be used as a two input multiplier with an enable disable switch. Figure 11 (a) and (b) show the input and output signals in such a scenario. It is necessary to amplify the output signal with a gain equal to the inverse of the amplitude of the pulse.

Three input mixer
Following signals were applied to the input of the circuit (21) If three signals are multiplied by the circuit, the output signal should contain frequencies . Therefore, if then the expected output frequency components are 21 kHz, 3 kHz, 9 kHz, and 15 kHz. Figure 12 shows the time domain and frequency domain signal of the output. mV H. M. V. R. Herath and G. H. I. Wimalarathna If then the expected output frequency components are and . Figure 13 shows the time domain and frequency domain signal of the output.

Three input AND logic
The circuit shown in the Figure 3 can be used as a 3-input AND gate with unipolar signaling. In that case the circuit operates in the nonlinear region. The truth table of 3-input AND gate is shown in the Table 1.   Figure 14 shows the input and output waveforms of the circuit during 3-input AND operation. Large input signals can be applied to the circuit in this case because the circuit operates in the nonlinear region. This operation is possible when unipolar signaling is used. It is possible to obtain if collectors of and are cross connected respectively to coupled emitters of and in the circuit as shown in the Figure 5.

Three input XOR logic
The circuit shown in the Figure 3 can be used as a 3-input XOR gate with bipolar signaling. Inverse logic is possible with reconnection of circuit. In that case the circuit operate in the nonlinear region. The truth table of 3-input AND gate is shown in the Table 2. Figure 15 shows the input and output waveforms of the circuit during 3-input XOR operation. Large input signals can be applied to the circuit in this case because the circuit operates in the nonlinear region. This operation is possible for the bipolar signaling.

Thermal performance
The following simulations were carried out to observe the thermal performance of the circuit. The output of the three input multiplier as shown in the Figure 6 was observed by varying the temperature between -25 0 C to 100 0 C. Figure  16 shows the observed results. The frequency of all the input signals considered in here are same. It was observed that the amplitude of the signal decline with the increase of temperature. According to (16) output voltage is inversely proportional to and proportional to . Output behavior can be explained by the fact that is proportional to the absolute temperature. Effect of the variation of with temperature, as seen from the simulation results, is small compared to the effect of the variation of .
The performance of the three input mixture for three different frequencies similar to the simulation result shown in the Figure 12 was evaluated for its thermal performance. It was observed, as predicted, that the output voltage reduces with the increase in temperature. The time domain and frequency domain representation for different temperature values are shown Figure 17 and Figure 18.

Noise Performance
The circuit was evaluated for its noise performance where fluctuations were introduced to the supply voltage and tail current . Figure 19 and Figure         The circuit was evaluated for its performance by varying the Signal to Noise Ratio (SNR) value at the input and it was observed that the performance of the circuit improves with the increasing SNR at the input. The Figures 21, 22, 23 show the output of three input multiplier for different SNR values.

CONCLUSIONS
This study presents a circuit topology for an eight octant analog multiplier. It is possible to invert the output signal of the circuit by cross connecting two BJT transistors that are directly connected to the current source. Simulations have shown that the circuit can be used as (a) eight-octant analog multiplier (b) switch that will control the output of a two input multiplier (c) three input mixer or (d) Three input emitter coupled logic circuit. In the simulations input signals are small in the cases (a), (b), and (c). By applying the modification proposed in the theory section it should be possible to operate the circuit for large input signals too. Thermal and noise simulations showed that the circuit operates as predicted for moderate variations of temperature and for low noise levels.